首页> 外国专利> HIGH VOLTAGE POWER MOSFET HAVING A VOLTAGE SUSTAINING REGION THAT INCLUDES DOPED COLUMNS FORMED BY TRENCH ETCHING AND DIFFUSION FROM REGIONS OF OPPOSITELY DOPED POLYSILICON

HIGH VOLTAGE POWER MOSFET HAVING A VOLTAGE SUSTAINING REGION THAT INCLUDES DOPED COLUMNS FORMED BY TRENCH ETCHING AND DIFFUSION FROM REGIONS OF OPPOSITELY DOPED POLYSILICON

机译:高压功率MOSFET的维持电压范围包括通过沟槽蚀刻形成的掺杂柱和从相反掺杂的多晶硅区域中扩散出来的电压

摘要

A kind of method being used to form power semiconductor is provided. This method starts from providing the substrate of first or second conduction type, and voltage sustaining region is formed on the substrate later. In voltage sustaining region by forming the epitaxial layer of at least one groove in deposit epitaxial layers in the first conductive type substrate. First polysilicon layer has the filling of the second dopant of the second conduction type in the trench. The epitaxial region of the second dopant doping is spread, and in the epitaxial layer of adjacent trenches. Second layer polysilicon has the subsequent filling of the first dopant of the first conduction type in the trench. The realization electrical contact compensation of the first and second dopant phase counterdiffusion in the second and first polysilicon layer is located in first and second layers of polysilicon. Finally, the upper area for forming at least one the second conduction type, voltage sustaining region is to limit knot therebetween.
机译:提供了一种用于形成功率半导体的方法。该方法从提供第一或第二导电类型的基板开始,并且随后在基板上形成电压维持区域。通过在第一导电型衬底中的沉积外延层中形成至少一个沟槽的外延层,在电压维持区域中。第一多晶硅层在沟槽中填充第二导电类型的第二掺杂剂。第二掺杂物掺杂的外延区域在相邻沟槽的外延层中扩展。第二层多晶硅随后在沟槽中填充第一导电类型的第一掺杂剂。在第二和第一多晶硅层中的第一和第二掺杂剂相反扩散的实现的电接触补偿位于多晶硅的第一和第二层中。最后,用于形成至少一个第二导电类型的电压维持区域的上部区域将限制它们之间的结。

著录项

  • 公开/公告号KR100952538B1

    专利类型

  • 公开/公告日2010-04-12

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20047010415

  • 发明设计人 블랜차드리차드에이.;

    申请日2002-12-30

  • 分类号H01L29/78;

  • 国家 KR

  • 入库时间 2022-08-21 18:31:21

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