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A process for the preparation of a gate electrodes structure, with an increase of the integrity of a gate stack with a large ε by means of protecting a coating on the gate under side during the outer surface of the gate side
A process for the preparation of a gate electrodes structure, with an increase of the integrity of a gate stack with a large ε by means of protecting a coating on the gate under side during the outer surface of the gate side
Complex gate stack with a dielectric material with a large ε and a metal-containing electrode material are formed by a protective layer, for example a silicon nitride layer, which during the entire production sequence, on the underside of the gate stack is maintained. For this purpose, a mask material before the removal of the deck materials on the spacer layer is applied which, for the encapsulation of the gate stack during the selective epitaxial growth of a deformation induzier ends semiconductor alloy be used. Consequently, it is possible for a better integrity over the entire production sequence, to be maintained, while at the same time, one or more lithographic processes are avoided.
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