The manner which makes the capacitive load of the flash memory X decoder decrease in order to control the voltage in the word belt and the choice belt accurately

摘要

An apparatus and a method for reducing capacitive loading in a Flash memory X-decoder so as to accurately control the voltages as selected wordlines and block select lines are provided. A decoding structure separately applies a first boosted voltage to the wordline N-well region and a second boosted voltage to the selected wordline so as to reduction capacitive loading ON the selected wordline due to heavy capacitive loading associated with the wordline N-well region. The decoding structure further applies a third boosted voltage to the select gate N-well region and a fourth boosted voltage to the block select line so as to reduction capacitive loading ON the block select line due to heavy capacitive loading associated with the select gate N-well region. As a consequence and an accurate voltage can be created quickly at the selected wordline since its capacitive loading path is very small.