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Low Cost Testing and Sorting for Integrated Circuits

机译:集成电路的低成本测试和分类

摘要

Methods of testing and sorting integrated circuits in clusters are disclosed. Each cluster has power and data terminals connected to common power and data busses providing a common power supply. Each integrated circuit has a first non-volatile memory storing an activation code and a second programmable non-volatile memory that is capable of storing the activation code. If an integrated circuit passes testing, the activation code stored in the first non-volatile memory is written into the second non-volatile memory. An integrated circuit is independently functional upon separation from the cluster if the codes in the first and second non-volatile memories match. Upon separation, integrated circuits are queried to determine which respond. Each integrated circuit includes logic adapted to determine whether the codes in the first and second non-volatile memories match. If the codes do not match, the logic permanently disables the integrated circuit upon separation from the cluster.
机译:公开了测试和分类集群中的集成电路的方法。每个群集的电源和数据端子均连接到公共电源和数据总线,以提供公共电源。每个集成电路具有存储激活码的第一非易失性存储器和能够存储激活码的第二可编程非易失性存储器。如果集成电路通过测试,则将存储在第一非易失性存储器中的激活码写入第二非易失性存储器。如果第一非易失性存储器和第二非易失性存储器中的代码匹配,则集成电路在与集群分离时独立地起作用。分离后,查询集成电路以确定哪个响应。每个集成电路包括适于确定第一和第二非易失性存储器中的代码是否匹配的逻辑。如果代码不匹配,则逻辑在与集群分离时将永久禁用集成电路。

著录项

  • 公开/公告号US2011122718A1

    专利类型

  • 公开/公告日2011-05-26

    原文格式PDF

  • 申请/专利权人 ROGER G. STEWART;

    申请/专利号US20080328675

  • 发明设计人 ROGER G. STEWART;

    申请日2008-12-04

  • 分类号G11C29/38;H01L21/66;

  • 国家 US

  • 入库时间 2022-08-21 18:15:01

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