首页> 外国专利> SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF MANUFACTURING THE SAME, A METHOD OF MANUFACTURING A VERTICAL MISFET AND A VERTICAL MISFET, AND A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE

SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF MANUFACTURING THE SAME, A METHOD OF MANUFACTURING A VERTICAL MISFET AND A VERTICAL MISFET, AND A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE

机译:半导体存储器装置及其制造方法,垂直MISFET和垂直MISFET的制造方法以及半导体装置和半导体装置的制造方法

摘要

Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate electrodes formed on corresponding side walls of the laminated bodies with gate insulating films interposed therebetween. In each vertical MISFET, the lower semiconductor layer constitutes a drain, the intermediate semiconductor layer constitutes a substrate (channel region), and the upper semiconductor layer constitutes a source. The lower semiconductor layer, the intermediate semiconductor layer and the upper semiconductor layer are each comprised of a silicon film. The lower semiconductor layer and the upper semiconductor layer are doped with a p type and constituted of a p type silicon film.
机译:垂直MISFET形成在驱动MISFET和传输MISFET之上。垂直MISFET包括矩形柱层叠体,每个矩形层叠体通过层叠下部半导体层(漏极),中间半导体层和上部半导体层(源极)而形成,以及形成在层叠体的相应侧壁上的具有栅绝缘膜的栅电极。插在它们之间。在每个垂直MISFET中,下部半导体层构成漏极,中间半导体层构成基板(沟道区),并且上部半导体层构成源极。下部半导体层,中间半导体层和上部半导体层均由硅膜构成。下部半导体层和上部半导体层掺杂有p型并且由p型硅膜构成。

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