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Semiconductor Package and Trace Substrate with Enhanced Routing Design Flexibility and Method of Manufacturing Thereof

机译:具有增强的布线设计灵活性的半导体封装和走线基板及其制造方法

摘要

A semiconductor package, a method for manufacturing the semiconductor package, a trace substrate and a method for manufacturing the trace substrate are provided. The semiconductor package includes a trace substrate, a chip and a plurality of wires. The trace substrate includes a plurality of trace, a plurality of conductive studs, a plurality of traces pads and a trace modling compound. The conductive studs are formed on the lower surfaces of the traces. The trace modling compound encapsulates the conductive studs and the trace, and exposes the lower surfaces of the conductive studs and the upper surfaces of the traces. The chip is disposed on the trace substrate, and the wires electrically connect the chip and the trace pads. The trace pads are not overlapping to the conductive studs.
机译:提供一种半导体封装,用于制造该半导体封装的方法,跟踪基板以及用于制造跟踪基板的方法。该半导体封装包括走线基板,芯片和多条导线。迹线基板包括多个迹线,多个导电柱,多个迹线焊盘和迹线调制化合物。导电柱形成在迹线的下表面上。迹线调制化合物封装导电柱和迹线,并露出导电柱的下表面和迹线的上表面。芯片设置在走线基板上,导线将芯片和走线垫电连接。迹线焊盘不与导电柱重叠。

著录项

  • 公开/公告号US2011210442A1

    专利类型

  • 公开/公告日2011-09-01

    原文格式PDF

  • 申请/专利权人 SHOA SIONG LIM;KLAN HOCK LIM;

    申请/专利号US200913127061

  • 发明设计人 SHOA SIONG LIM;KLAN HOCK LIM;

    申请日2009-11-06

  • 分类号H01L23/485;H01L21/56;H01L21/78;

  • 国家 US

  • 入库时间 2022-08-21 18:14:10

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