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Semiconductor device including stress relaxation gaps for enhancing chip package interaction stability
Semiconductor device including stress relaxation gaps for enhancing chip package interaction stability
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机译:包括应力松弛间隙的半导体器件,用于增强芯片封装相互作用的稳定性
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摘要
By dividing a single chip area into individual sub-areas, a thermally induced stress in each of the sub-areas may be reduced during operation of complex integrated circuits, thereby enhancing the overall reliability of complex metallization systems comprising low-k dielectric materials or ULK material. Consequently, a high number of stacked metallization layers in combination with increased lateral dimensions of the semiconductor chip may be used compared to conventional strategies.
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