首页> 外国专利> Method for reading and programming a charge-trap memory device compensated for an array/second-bit/neighbor-bit effect

Method for reading and programming a charge-trap memory device compensated for an array/second-bit/neighbor-bit effect

机译:读取和编程补偿了阵列/第二位/邻居位效应的电荷陷阱存储器件的方法

摘要

A method for programming a memory is provided. The memory includes a number of cells and has a preset PV level for a target cell. The method includes programming a first-side of the target cell to have a Vt level not lower than the preset PV level; reading a Vt level of a second-side of the target cell and accordingly obtaining a corrected PV level corresponding to the first-side; and programming the first-side of the target cell to have a Vt level not lower than the corresponding corrected PV level.
机译:提供了一种用于编程存储器的方法。该存储器包括多个单元,并且具有用于目标单元的预设PV水平。该方法包括将目标单元的第一侧编程为具有不低于预设PV水平的Vt水平;读取目标电池的第二面的Vt电平,从而获得对应于第一面的校正后的PV电平;以及将目标单元的第一侧编程为具有不低于相应的校正后的PV电平的Vt电平。

著录项

  • 公开/公告号US8031520B2

    专利类型

  • 公开/公告日2011-10-04

    原文格式PDF

  • 申请/专利权人 CHUN-YU LIAO;

    申请/专利号US20080195713

  • 发明设计人 CHUN-YU LIAO;

    申请日2008-08-21

  • 分类号G11C16/34;

  • 国家 US

  • 入库时间 2022-08-21 18:09:04

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