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Integrated circuits and methods to compensate for defective non-volatile embedded memory in one or more layers of vertically stacked non-volatile embedded memory

机译:补偿垂直堆叠的非易失性嵌入式存储器的一层或多层中的有缺陷的非易失性嵌入式存储器的集成电路和方法

摘要

Embodiments of the invention relate generally to data storage and computer memory, and more particularly, to systems, integrated circuits and methods to compensate for defective memory in third dimension memory technology. In a specific embodiment, an integrated circuit is configured to compensate for defective memory cells. For example, the integrated circuit can include a memory having memory cells that are disposed in multiple layers of memory. It can also include a memory reclamation circuit configured to substitute a subset of the memory cells for one or more defective memory cells. At least one memory cell in the subset of the memory cells resides in a different plane in the memory than at least one of the one or more defective memory cells.
机译:本发明的实施例总体上涉及数据存储和计算机存储器,并且更具体地,涉及用于补偿三维存储技术中的缺陷存储器的系统,集成电路和方法。在特定实施例中,集成电路被配置为补偿有缺陷的存储单元。例如,集成电路可以包括存储器,该存储器具有布置在多层存储器中的存储器单元。它还可以包括存储器回收电路,该存储器回收电路被配置为用一个或多个有缺陷的存储器单元替代存储​​器单元的子集。与一个或多个有缺陷的存储单元中的至少一个相比,在存储单元的子集中的至少一个存储单元位于存储器中的不同平面中。

著录项

  • 公开/公告号US7903485B2

    专利类型

  • 公开/公告日2011-03-08

    原文格式PDF

  • 申请/专利权人 ROBERT NORMAN;

    申请/专利号US20100807836

  • 发明设计人 ROBERT NORMAN;

    申请日2010-09-14

  • 分类号G11C29/00;

  • 国家 US

  • 入库时间 2022-08-21 18:07:45

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