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A non-volatile floating gate memory cell with floating gates formed in cavities, and array thereof, and method of formation

机译:具有在腔中形成的浮置栅极的非易失性浮置栅极存储单元及其阵列以及形成方法

摘要

non-volatile memory cell having a single crystal semiconductor material such as single crystal silicon of a first conductivity type. The first conductivity type and a second conductivity type formed on the other of the spaced first and second regions of the semiconductor material. The channel region having a first portion and a second portion connecting the first and second regions for the conduction of electric charge. The dielectric is formed over the channel region. A floating gate which is electrically conductive or non-number jeonseongil spaced includes a first portion of the channel region in the dielectric. A first portion of the channel region is adjacent to the first floating gate is substantially triangular shape in the first region. The floating gate is formed in the cavity. The gate electrode is coupled capacitively to the first floating gate, and a second portion of the channel region and is separated. A second portion of the channel region is between the first portion and the second region. Two-way non-volatile memory cells each provided with two floating gate formed in the cavity. Method for producing a non-volatile memory cells and arrays is also disclosed.
机译:具有单晶半导体材料(例如具有第一导电类型的单晶硅)的非易失性存储单元。在半导体材料的隔开的第一区域和第二区域中的另一个上形成的第一导电类型和第二导电类型。沟道区具有第一部分和第二部分,第二部分连接第一和第二区域以用于电荷的传导。电介质形成在沟道区上方。导电或无间隔的浮栅包括在电介质中的沟道区的第一部分。沟道区域的第一部分与第一浮置栅极相邻,在第一区域中基本上为三角形。浮置栅极形成在空腔中。栅电极电容性地耦合到第一浮栅和沟道区的第二部分并且被分离。沟道区域的第二部分在第一部分和第二区域之间。两路非易失性存储单元,每个非易失性存储单元都具有在空腔中形成的两个浮置栅极。还公开了用于制造非易失性存储单元和阵列的方法。

著录项

  • 公开/公告号KR101025148B1

    专利类型

  • 公开/公告日2011-03-31

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20040023857

  • 发明设计人 첸보미;예빙;리다나;

    申请日2004-04-07

  • 分类号H01L27/115;

  • 国家 KR

  • 入库时间 2022-08-21 17:50:28

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