METHOD FOR DESIGNING SCAN TEST CIRCUIT FOR SEMICONDUCTOR INTEGRATED CIRCUIT, SCAN TEST CIRCUIT AND SCAN TEST METHOD

摘要

PROBLEM TO BE SOLVED: To achieve a test based on an actual operation speed of a single cycle path in a logic circuit in which the single cycle path and a multi-cycle path are mixed when performing a scan test by integrating a scan path into a semiconductor integrated circuit.;SOLUTION: Timing analysis is performed in an actual operation mode to extract a multi-cycle path. Then, branch points of the single cycle path and the multi-cycle path and a junction of the single cycle path and the multi-cycle path are extracted. An output fixing circuit is inserted into a multi-cycle path side route on the output side from the branch point and a multi-cycle path side route on the input side from the junction. Provided that, the output fixing circuit is a circuit for outputting the same signals as input during a multi-cycle test, and outputting an arbitrary fixed value during a single cycle test.;COPYRIGHT: (C)2013,JPO&INPIT