SEMICONDUCTOR INTEGRATED CIRCUIT, SCANNING CIRCUIT DESIGNING METHOD,TEST PATTERN CREATION METHODS AND SCAN TEST METHOD

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of suppressing the number of shifts and number of output terminals without overlooking a fault.;SOLUTION: The scan chain 4 forming a tree shape constitution with a plurality of flip-flops, and the scan chains 5, 6 serially connected as a whole with a plurality of flip-flops are provided. For the scan chain 4, from the scan input terminal 2 the scan data set up value is set up with clock signal CLKH. For the scan chains 5, 6 from the scan input terminal 2 the scan data set up value is set up with the clock signals CLK and CLKV. The capture data from the combination circuit part, the scan chain 5 receives parallel data from the flip-flops FF8, FF6, and FF3 of the scan chain 4, and scans out from the scan output terminal 3 serially.;COPYRIGHT: (C)2006,JPO&NCIPI