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Array of non-volatile memory cells including embedded local and global reference cells and system

机译:非易失性存储单元阵列,包括嵌入式本地和全局参考单元以及系统

摘要

An array of memory cells has a first side adjacent to a first column, a second side opposite the first side, a third side adjacent to a first row, and a fourth side opposite the third side. Each memory cell is connected to a bit line, a high voltage source, and a low voltage source. Reference cells, substantially the same as the memory cells, evenly spaced apart, are embedded in the array. A high voltage decoder is on the first side, connected to the memory cells and reference cells in the same row. A low voltage row decoder is on the second side, connected to the memory cells and reference cells in the same row. Sense amplifiers are on the third side, connected to the memory cells and to the reference cells.
机译:存储器单元阵列具有与第一列相邻的第一侧,与第一侧相对的第二侧,与第一行相邻的第三侧以及与第三侧相对的第四侧。每个存储单元连接到位线,高压源和低压源。与存储单元基本相同且均匀间隔的参考单元被嵌入到阵列中。高压解码器在第一侧,连接到同一行中的存储单元和参考单元。低压行解码器在第二侧,连接到同一行中的存储单元和参考单元。读出放大器在第三侧,连接到存储单元和参考单元。

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