首页> 外国专利> SEMICONDUCTOR DEVICE AND A FORMING METHOD THEREOF CAPABLE OF IMPROVING A SHORT MARGIN BETWEEN A GATE AND A METAL WIRE CONTACT

SEMICONDUCTOR DEVICE AND A FORMING METHOD THEREOF CAPABLE OF IMPROVING A SHORT MARGIN BETWEEN A GATE AND A METAL WIRE CONTACT

机译:能够改善栅极与金属线接触的短边距的半导体器件及其形成方法

摘要

PURPOSE: A semiconductor device and a forming method thereof are provided to prevent a short between a gate and a metal contact plug by etching a region between a dummy gate and an operation gate with a self-alignment method.;CONSTITUTION: A semiconductor substrate includes an active region(104) defined by a device isolation layer. An operation gate(106R) is formed on the upper side of the active region. A dummy gate(106D) is formed on the upper side of the device isolation layer. A metal contact hole is defined by an interlayer dielectric pattern(110a). The interlayer dielectric pattern exposes adjacent active regions while the device isolation layer is interposed.;COPYRIGHT KIPO 2012
机译:目的:提供一种半导体器件及其形成方法,以通过利用自对准方法刻蚀伪栅极与操作栅极之间的区域来防止栅极与金属接触插塞之间的短路。由器件隔离层限定的有源区(104)。在有源区的上侧形成有操作门(106R)。伪栅极(106D)形成在器件隔离层的上侧。金属接触孔由层间电介质图案(110a)限定。在插入器件隔离层的同时,层间电介质图案暴露出相邻的有源区域。; COPYRIGHT KIPO 2012

著录项

  • 公开/公告号KR20120029885A

    专利类型

  • 公开/公告日2012-03-27

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20100091994

  • 发明设计人 KIM HYUN JUNG;

    申请日2010-09-17

  • 分类号H01L29/78;H01L21/28;H01L21/336;

  • 国家 KR

  • 入库时间 2022-08-21 17:10:21

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号