DUAL-METAL CMOS TRANSISTORS WITH TUNABLE GATE ELECTRODE WORK FUNCTION AND METHOD OF MAKING THE SAME

摘要

double metal CMOS arrangement and a method of manufacturing the same are formed in the substrate 10 and the substrate 10, provides a plurality of NMOS device 44 and the PMOS device 46. Each of the plurality of NMOS device 44 and PMOS device 46 has the gate electrode. Each NMOS gate electrode comprises a first metal region 48 a on the substrate 10 of the first silicide region over 50 and the first silicide region (50). The first silicide region 50 of the NMOS gate electrode is composed of a first silicide having a work function close to the conduction band of silicon. Each PMOS gate electrode may include a second metal region 52 a on the second silicide region 54 and the second silicide region 54 on the substrate. A second silicide region 54 of the PMOS gate electrode is composed of the second silicide region 54 having a work function close to the valence band of silicon.