STRUCTURES AND METHODS OF TRIMMING THRESHOLD VOLTAGE OF A FLASH EEPROM MEMORY

摘要

Multi -level - provides adjustments to the FET NVM cells in the cell (MLC) operation. The method includes the steps of: (a) each applied to the bulk of the first voltage and the second voltage control gate and repeat programmed FET NVM cell , (b) repeating the programmed FET NVM for a period of time to produce a threshold voltage reduction limited a step of applying a predetermined signal to the drain of the cell, the polarity of the first voltage and the second voltage is opposite to the polarity of the signal . Thus, the accumulation of charge in the electricity storage material is accurately controlled within a range of charge states of a multi- high density digital storage - can form the bit / cell ;