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Bonding method for three-dimensional integrated circuit and three-dimensional integrated circuit thereof

机译:三维集成电路的键合方法及其三维集成电路

摘要

The present invention discloses a bonding method for a three-dimensional integrated circuit and the three-dimensional integrated circuit thereof. The bonding method comprises the steps of: providing a substrate; depositing a film layer on the substrate; providing a light source to light onto the film layer to form a graphic structure; forming a metal co-deposition layer by a first metal and a second metal that are co-deposited on the film layer; providing a first integrated circuit having the substrate, the film layer and the metal co-deposition layer sequentially; providing a second integrated circuit that having the metal co-deposition layer, the film layer and the substrate sequentially; and the first integrated circuit is bonded with the second integrated circuit at a predetermined temperature to form a three-dimensional integrated circuit.
机译:本发明公开了一种用于三维集成电路的键合方法及其三维集成电路。结合方法包括以下步骤:提供基底;在基板上沉积膜层;提供光源以照射到薄膜层上以形成图形结构;通过共沉积在膜层上的第一金属和第二金属形成金属共沉积层;提供依次具有基板,膜层和金属共沉积层的第一集成电路;提供第二集成电路,其依次具有金属共沉积层,膜层和基板;所述第一集成电路与所述第二集成电路在预定温度下键合以形成三维集成电路。

著录项

  • 公开/公告号US8508041B2

    专利类型

  • 公开/公告日2013-08-13

    原文格式PDF

  • 申请/专利权人 KUAN-NENG CHEN;SHENG-YAO HSU;

    申请/专利号US201113325587

  • 发明设计人 KUAN-NENG CHEN;SHENG-YAO HSU;

    申请日2011-12-14

  • 分类号H01L23/34;

  • 国家 US

  • 入库时间 2022-08-21 16:48:26

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