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BONDING METHOD FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT AND THREE-DIMENSIONAL INTEGRATED CIRCUIT THEREOF

机译:三维综合电路的粘接方法及其三维综合电路

摘要

is the bonding method and the three-dimensional integrated circuit of a three-dimensional integrated circuit is disclosed according to the present invention . Matching method of a three-dimensional integrated circuit , comprising: providing a substrate , depositing a layer on the substrate , forming a graphic structure by irradiating light onto the layer, the cavity in a first phase to be deposited on the floor metal and forming a metal layer by co- depositing a second metal , the substrate in sequence , providing the first integrated circuit layer and the metal having a co- deposited layer , sequentially co- deposited metal layer , and the substrate layer the method comprising: providing a second integrated circuit having a , and by bonding the first integrated circuit at a predetermined temperature and the second integrated circuit includes forming a three-dimensional integrated circuit . ;
机译:图3是根据本发明的键合方法,并且公开了三维集成电路的三维集成电路。三维集成电路的匹配方法,包括:提供衬底,在衬底上沉积一层,通过向层上照射光形成图形结构,第一阶段的空腔沉积在地板金属上并形成衬底。通过依次沉积第二金属,衬底,提供第一集成电路层和具有共沉积层的金属,依次共沉积金属层和衬底层的金属层,该方法包括:提供第二集成层电路,通过在预定温度下结合第一集成电路和第二集成电路,包括形成三维集成电路。 ;

著录项

  • 公开/公告号KR101384131B1

    专利类型

  • 公开/公告日2014-04-10

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20120011321

  • 发明设计人 수 솅-야오;첸 쿠안-넹;

    申请日2012-02-03

  • 分类号H01L21/20;

  • 国家 KR

  • 入库时间 2022-08-21 15:41:07

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