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Signal transmission circuit for increasing soft error tolerance

机译:信号传输电路,可提高软错误容限

摘要

A CAD device according to the embodiments includes means that determines signal transmission time of each signal transmission circuit in an LSI circuit, means that determines an output inversion rate of a flip-flop circuit included in each signal transmission circuit when the flip-flop circuit is exposed to radiation, means that determines a signal transmission circuit that is a critical path, means that calculates a total soft error rate of the LSI circuit on the basis of the signal transmission time, the output inversion rate, and a clock period, and means that, when a predetermined soft error rate is less than the total soft error rate of the LSI circuit as a result of comparison, reducing the total soft error rate of the LSI circuit to the extent possible without changing signal transmission time of the signal transmission circuit, which is a critical path.
机译:根据实施例的CAD设备包括:确定LSI电路中的每个信号传输电路的信号传输时间的装置;当触发器电路被确定时,确定每个信号传输电路中包括的触发器电路的输出反转率的装置。暴露于辐射下的装置,它确定信号传输电路是一条关键路径,意味着根据信号传输时间,输出反相率和时钟周期来计算LSI电路的总软错误率,以及比较的结果是,当预定的软错误率小于LSI电路的总软错误率时,在不改变信号传输电路的信号传输时间的情况下,尽可能地减小LSI电路的总软错误率。 ,这是一条关键路径。

著录项

  • 公开/公告号US8561006B2

    专利类型

  • 公开/公告日2013-10-15

    原文格式PDF

  • 申请/专利权人 TAIKI UEMURA;YOSHIHARU TOSAKA;

    申请/专利号US20080053886

  • 发明设计人 TAIKI UEMURA;YOSHIHARU TOSAKA;

    申请日2008-03-24

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 16:46:59

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