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Memory built-in self test (MBIST) circuitry configured to facilitate production of pre-stressed integrated circuits and methods
Memory built-in self test (MBIST) circuitry configured to facilitate production of pre-stressed integrated circuits and methods
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机译:内存内置自测(MBIST)电路,配置为有助于生产预应力集成电路和方法
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摘要
Integrated circuits with memory built-in self test (MBIST) circuitry and methods are disclosed that employ enhanced features. In one aspect of the invention, MBST circuitry is used set memory elements of arrays to a first state and then to an inverse state during a burn-in operation to maintain each of the two opposing states for a desired time in order to either force a failure of the integrated circuit component or produce a pre-stressed component beyond an infancy stage. Preferably, an integrated circuit is provided having MIBST circuitry configured to serially test multiple arrays of memory elements within a component of the integrated circuit and to also conduct parallel initialization of the serially tested arrays.
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