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Method for fabricating surrounding-gate silicon nanowire transistor with air sidewalls
Method for fabricating surrounding-gate silicon nanowire transistor with air sidewalls
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机译:具有空气侧壁的围栅硅纳米线晶体管的制造方法
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摘要
A method for fabricating a surrounding-gate silicon nanowire transistor with air sidewalls is provided. The method is compatible with the CMOS process; the introduced air sidewalls can reduce the parasitic capacitance effectively and increase the transient response characteristic of the device, thus being applicable to a high-performance logic circuit.
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