Techniques and structures for testing integrated circuits in flip-chip assemblies

摘要

A method for rejoining an IC die, removed from an existing substrate, to a new substrate, is disclosed herein. In one embodiment, such a method includes grinding an existing substrate from an IC die to create a substantially planar surface exposing interconnects and surrounding underfill material. A new substrate is provided having electrically conductive pedestals protruding therefrom. The electrically conductive pedestals are positioned to align with the exposed interconnects and have a melting point substantially higher than the melting point of the interconnects. The method places the exposed interconnects in contact with the electrically conductive pedestals. The method then applies a reflow process to melt and electrically join the exposed interconnects with the electrically conductive pedestals. A structure produced by the method is also disclosed.