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RESISTIVE CELL CONFIGURATION FOR SENSING THE RESISTANCE STATE OF AN MRAM BIT CELL TO IDENTIFY A LOGIC LEVEL STORED IN A MAGNETIC MEMORY ELEMENT
RESISTIVE CELL CONFIGURATION FOR SENSING THE RESISTANCE STATE OF AN MRAM BIT CELL TO IDENTIFY A LOGIC LEVEL STORED IN A MAGNETIC MEMORY ELEMENT
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机译:电阻单元配置,用于感测MRAM位单元的电阻状态以标识存储在磁存储元件中的逻辑电平
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摘要
PURPOSE: Resistive cell configuration for sensing the resistance state of an MRAM bit cell senses a value stored in the MRAM bit cell by defining a reference value for comparison.;CONSTITUTION: A reference circuit includes a high resistance standard and a low resistance standard and generates an electrical parameter having a reference value when receiving a reference bias current. A comparator circuit (55) is connected to compare the reference value with a cell value and has an output part reading out a data value corresponding to the cell value greater than or less than the reference value. The reference value represents a value included between values of the electric parameter produced by a memory cell in the state of high and low electrical resistance.;COPYRIGHT KIPO 2013;[Reference numerals] (36) Free layer; (37) Fixed layer; (52) Bias current source
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