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Micromagnetic simulation of write operation in Gbit-MRAM memory cell

机译:Gbit-MRAM存储器单元中写入操作的微磁模拟

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Write-operation in magnetic random access memory (MRAM) with bit density of Gbit/cm{sup}2 order has been numerically simulated for low sub-micron scale magnetic cells. The calculated results show that the amplitude of I{sub}w is proportional to t/w, while that of ΔE is proportional to wt{sup}2. To obtain the sufficient energy barrier against a thermal fluctuation (ΔE80k{sub}BT, at 300 K), the thicker magnetic cell is required as the cell is downsized for high-density memory applications, although the thinner one is preferred form the view point of minimizing the switching current. The margin of the switching current for selective write-operation is decreased with decreasing the lateral aspect ratio of the cell. The addressability for the write-operation is also degraded by the formation of structural defect in the cell. In this paper, practical tolerance of the structural defect in the magnetic cell applicable for Gbit-MRAM are discussed.
机译:对于低亚微米级磁电池,已经在数值模拟了Gbit / cm {sup} 2的比特密度的磁随机存取存储器(MRAM)中的写入操作。 计算结果表明,I {Sub} W的幅度与T / W成比例,而ΔE的幅度与WT {SUP} 2成比例。 为了获得足够的能量屏障(ΔE80K{Sub} Bt,300k),较厚的磁性电池是因为电池被缩小为高密度存储器应用,尽管较薄的较薄形成了观点 最小化开关电流。 随着细胞的横向宽高比,选择性写入操作的开关电流的裕度降低。 通过细胞中的结构缺陷的形成,写入操作的可寻址也会降低。 本文讨论了适用于Gbit-MRAM的磁电池中结构缺陷的实际耐受性。

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