Pipelined decoding apparatus and method based on parallel processing

摘要

This invention relates to an apparatus and method for decoding a video based on the parallel processing. Parallel processing pipeline based decoding apparatus according to the present invention, by performing context adaptive variable length decoding (CAVLC) on the compressed bitstream SPS, PPS, slice header, macro block header, and decoding the bits for the macroblock coefficient value stream processors; Station for the decoded macro-block header and a plurality of macroblocks using the macroblock quantization coefficient value (IQ), inverse transformation (IT) and motion compensation (MC) operation at the same time parallel to the parallel array processor; The intra-prediction for a plurality of macro blocks (IP) and the de-blocking filter (DF) processor for sequential processing sequential processing operations; DMA controller for controlling data transfer to the macro-block among the plurality of the processor; The data transmission for the operation and the plurality of macro-blocks of the processor sequencer processor for pipeline; A main processor for performing initialization of the processor, the frame control and the slice control; And wherein the bit stream processor, the parallel array processor, the sequential processing processor, the DMA controller, and a bus matrix switch to interconnect the processors and the main processor sequencer.