PIPELINED DECODING APPARATUS AND METHOD BASED ON PARALLEL PROCESSING

摘要

The device and method that the present invention relates to a kind of to decode an image library in parallel processing. Parallel processing pipeline base decoding apparatus according to the present invention, (context-adaptive variable-length coding) is decoded by executing the context adaptive variable length on the bit stream SPS, PPS, segmentation title of compression, macro block head, for macroblock coefficient value streamline processing solution code bit; It stands for translator block stem and multiple macroblocks, is operated using macroblock quantisation coefficient value (IQ), inverse transformation (IT) and the amount of movement compensation (MC) of dynamic image compression coding worm parallel with parallel array processor simultaneously; Intra-prediction is used for sequence processing sequence process operation for multiple macro blocks (IP) and de-blocking filter (DF) processor; DMA controller for controlling data is transferred to macro block among a large amount of processors; Operation and a large amount of macro block of the data transmission for the processor sequencer processor of pipeline; One master processor is used to execute the initialization of processor, frame control and thin slice control; Wherein bit stream processor, parallel array processor, sequence working process device, DMA controller and a bus matrix turn to interconnecting processor and master processor SEQ sequencer.