Silicon-on-insulator hybrid wafers with double-box backgate and channels with improved mobility

摘要

A semiconductor wafer structure for integrated circuit units includes a full substrate; a lower insulation layer formed on the solid substrate; an electrically conductive back gate layer formed on the lower insulation layer; an upper insulation layer formed on the back gate layer; and a semiconductor-on-insulator hybrid layer formed on the top insulation layer, the semiconductor-on-insulator hybrid layer comprising a first portion having a first crystal orientation and a second portion having a second crystal orientation.