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Semiconductor package terminal assignment method, semiconductor package terminal assignment support apparatus, semiconductor package, and program for executing semiconductor package terminal assignment method

机译:半导体封装端子分配方法,半导体封装端子分配支持装置,半导体封装以及用于执行半导体封装端子分配方法的程序

摘要

A process of efficiently allocating any of the plurality of terminals of the package substrate on which the semiconductor chip is mounted to each of the plurality of pads of the semiconductor chip. When assigning one of multiple terminals on a package substrate to each of multiple pads on a semiconductor chip, the maximum allowable distance between each pad and the terminal to be assigned to each pad is restricted. One or more assigned terminals for each pad so that the relative distance between each of the pads and the terminal selected for each pad is within the range of the maximum allowable distance Extract candidates. Based on the extracted assignment terminal candidates, one of the terminals is determined as an assignment terminal and a process of assigning to one of the pads is performed. The process is a process of preferentially allocating one of the terminals to a pad that has a minimum number of allocated terminal candidates in an unallocated state and is one or more.
机译:一种有效地将其上安装有半导体芯片的封装基板的多个端子中的任何一个分配到半导体芯片的多个焊盘中的每个焊盘的过程。当将封装基板上的多个端子之一分配给半导体芯片上的多个焊盘中的每个焊盘时,每个焊盘与要分配给每个焊盘的端子之间的最大允许距离受到限制。为每个焊盘分配一个或多个端子,以使每个焊盘与为每个焊盘选择的端子之间的相对距离在最大允许距离Extract候选范围内。基于所提取的分配终端候选者,将终端之一确定为分配终端,并且执行分配给焊垫之一的处理。该处理是将终端之一优先分配给在未分配状态下具有最小数量的已分配终端候选并且是一个或多个的填充的处理。

著录项

  • 公开/公告号JPWO2012063284A1

    专利类型

  • 公开/公告日2014-05-12

    原文格式PDF

  • 申请/专利权人 富士通株式会社;

    申请/专利号JP20120542696

  • 发明设计人 鈴木 啓介;

    申请日2010-11-10

  • 分类号G06F17/50;H05K3;

  • 国家 JP

  • 入库时间 2022-08-21 16:11:37

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