首页> 外国专利> HIGH-CURRENT N-TYPE SILICON-ON-INSULATOR LATERAL INSULATED-GATE BIPOLAR TRANSISTOR

HIGH-CURRENT N-TYPE SILICON-ON-INSULATOR LATERAL INSULATED-GATE BIPOLAR TRANSISTOR

机译:高电流N型绝缘体硅横向绝缘栅双极晶体管

摘要

A high-current, N-type silicon-on-insulator lateral insulated-gate bipolar transistor, including: a P-type substrate, a buried-oxide layer disposed on the P-type substrate, an N-type epitaxial layer disposed on the oxide layer, and an N-type buffer trap region. A P-type body region and an N-type central buffer trap region are disposed inside the N-type epitaxial layer; a P-type drain region is disposed in the buffer trap region; N-type source regions and a P-type body contact region are disposed in the P-type body region; an N-type base region and a P-type emitter region are disposed in the buffer trap region; gate and field oxide layers are disposed on the N-type epitaxial layer; polycrystalline silicon gates are disposed on the gate oxide layers; and a passivation layer and metal layers are disposed on the surface of the symmetrical transistor. P-type emitter region output and current density are improved without increasing the area of the transistor.
机译:一种高电流,N型绝缘体上硅横向绝缘栅双极晶体管,包括:P型衬底,设置在所述P型衬底上的掩埋氧化物层,设置在所述P型衬底上的N型外延层。氧化物层和N型缓冲陷阱区域。在N型外延层的内部配置有P型体区域和N型中央缓冲阱区域。在缓冲阱区中设置有P型漏极区。 N型源极区和P型体接触区设置在P型体区中。 N型基极区和P型发射极区设置在缓冲阱区中。栅极和场氧化层设置在N型外延层上。多晶硅栅极设置在栅极氧化物层上。钝化层和金属层设置在对称晶体管的表面上。在不增加晶体管面积的情况下,改善了P型发射极区域的输出和电流密度。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号