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GaN High Voltage HFET with Passivation Plus Gate Dielectric Multilayer Structure
GaN High Voltage HFET with Passivation Plus Gate Dielectric Multilayer Structure
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机译:具有钝化加栅介质多层结构的GaN高压HFET
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摘要
A method of fabricating a multi-layer structure for a power transistor device includes performing, within a reaction chamber, a nitrogen plasma strike, resulting in the formation of a nitride layer directly on a nitride-based active semiconductor layer. A top surface of the nitride layer is then exposed to a second source. A subsequent nitrogen-oxygen plasma strike results in the formation of an oxy-nitride layer directly on the nitride layer. The nitride layer comprises a passivation layer and the oxy-nitride layer comprises a gate dielectric of the power transistor device.
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