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Gate electrodes of a semiconductor device formed by a hard mask and double exposure in combination with a shrink spacer
Gate electrodes of a semiconductor device formed by a hard mask and double exposure in combination with a shrink spacer
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机译:半导体器件的栅电极由硬掩模和两次曝光结合收缩间隔物形成
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摘要
When forming complex gate electrode structures, a double exposure double etch strategy may be applied, in which the lateral distance in the width direction of the gate electrode structures may be defined prior to forming mask features for defining the gate length. In this case, the width dimension of the mask opening may be adjusted on the basis of a spacer element, which may thus allow providing a reduced dimension on the basis of well-established process techniques.
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