首页>
外国专利>
Physically aware logic synthesis of integrated circuit designs
Physically aware logic synthesis of integrated circuit designs
展开▼
机译:集成电路设计的物理感知逻辑综合
展开▼
页面导航
摘要
著录项
相似文献
摘要
In one embodiment of the invention, a method of synthesizing physical gates from register transfer logic code for an integrated circuit design is disclosed. The method includes reading a register transfer level (RTL) input file describing an integrated circuit design; parsing and translating the RTL input file into a plurality of Boolean logic equations; translating the plurality of Boolean logic equations into a plurality of logic primitives; placing the plurality of logic primitives into a floorplan of the integrated circuit design, wherein the placement of the plurality of logic primitives defines wire interconnects; and optimizing each of the plurality of Boolean logic equations in response to wire costs and wire timing delays.
展开▼