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Method of forming solderable side-surface terminals of quad no-lead frame (QFN) integrated circuit packages

机译:四方无铅框架集成电路封装的可焊接侧面端子的形成方法

摘要

A method of forming an integrated circuit (IC) package is disclosed comprising: (a) removing oxides from side surfaces of terminals of the IC package; (b) substantially covering an underside of the terminals of the IC package; and (c) forming a solder coating on the side surfaces of terminals of the IC packages while covering the underside of the terminals of the IC package. The solder coating on the side surfaces of the terminals protects the terminals from oxidation due to aging and subsequent processes. Additionally, the solder coating on the side surfaces of the terminals substantially improves the solderability of the IC package to printed circuit boards (PCBs) or other mountings. This further facilitates the inspection of the solder attachment using less expensive and complicated methods.
机译:公开了一种形成集成电路(IC)封装的方法,该方法包括:(a)从IC封装的端子的侧面去除氧化物;以及(b)基本上覆盖IC封装端子的底面; (c)在覆盖IC封装端子的底面的同时,在IC封装端子的侧面上形成焊料涂层。端子侧面的焊料涂层可防止端子因老化和后续工艺而氧化。另外,端子侧面上的焊料涂层大大改善了IC封装与印刷电路板(PCB)或其他安装件的可焊性。这进一步有利于使用较便宜和复杂的方法来检查焊料附接。

著录项

  • 公开/公告号US8709870B2

    专利类型

  • 公开/公告日2014-04-29

    原文格式PDF

  • 申请/专利权人 KENNETH J. HUENING;

    申请/专利号US20100688158

  • 发明设计人 KENNETH J. HUENING;

    申请日2010-01-15

  • 分类号H01L21/00;

  • 国家 US

  • 入库时间 2022-08-21 16:00:37

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