Procedure implemented in a computer for the numerical simulation of semiconductor devices containing tunnel junctions

摘要

Procedure implemented by computer for the numerical simulation of a semiconductor device comprising one or more tunnel junctions, preferably a solar cell, in which: - the semiconductor device has a main plane and is described by a model that includes electronic components distributed as along this main plane comprising interconnected elementary units (U), - the model comprises at least elementary units (U.1) that model the perimetral regions and elementary units (U.2) that model the internal regions of the semiconductor device, - the behavior of each elementary unit (U) describes the transverse structure of the semiconductor device at the point of the main plane associated with that elementary unit and is represented by a set of interconnected elementary modules, where each is associated with a physical effect or component of the semiconductor device in the transverse direction, and where each elementary module is composed of at least one simple electronic component; where the overall behavior of the semiconductor device is simulated following the following steps: - a circuit is generated that is obtained by connecting all the elementary units (U), - a non-linear system of equations associated with the circuit is obtained, as well as unknown variables , that is, the unknown voltages and currents, - an initial estimate of the unknown voltages and currents is made, - the system is solved by an iterative process until a stop condition is met, where the procedure is characterized in that The elementary units incorporate as the module (M) for the tunnel junction a combination of - a functional element that takes into account the relationship between the current and the voltage I = f (V) described by a characteristic curve comprising four regions Consecutive: a) an ohmic region, with a positive slope until a certain peak current value (Ip) is reached, b) a region n of negative resistance, which starts from the peak current (Ip) and descends with a negative slope to a local minimum (Iv) or the valley current, c) a region of excess current, which starts from the valley current (Iv) and shows a positive slope; and, d) a diode region, which has a steeper slope than the region of excess current; and - one or more resistors (R) distributed along the main plane that allow current flow between adjacent elementary units.