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SHIFT REGISTER AND GATE DRIVING CIRCUIT USING THE SAME

机译:使用相同的移位寄存器和栅极驱动电路

摘要

The present invention relates to a gate driving circuit which includes N shift resisters which are connected sequentially to supply a scan signal to each gate line of a display device and allows output signals of the neighboring shift resisters to be partially overlapped. An n^th shift resistor (n is a natural number greater than 1 and less than or equal to N) comprises an input unit which outputs a directional input signal having an a gate high voltage (VGH) or a gate low voltage (VGL) by the output signal of an (n-2)^th shift resistor or an (n+2)^th shift resistor to a bootstrap node; a pull-up unit which is connected to the bootstrap node and activates a first clock signal by a signal of the bootstrap node to output the first clock signal to the gate line as an output signal; and a noise eliminating unit which outputs an output signal of an (n-1)^th shift resister to the bootstrap node by a fourth clock signal in the normal direction operation and outputs an output signal of an (n+1)^th shift resister to the bootstrap node by a second clock signal in the reverse direction operation.
机译:栅极驱动电路技术领域本发明涉及一种栅极驱动电路,其包括顺序连接的N个移位电阻器,以将扫描信号提供给显示装置的每条栅极线,并且使相邻的移位电阻器的输出信号部分重叠。第n个移位电阻器(n是大于1且小于或等于N的自然数)包括输入单元,该输入单元输出具有栅极高电压(VGH)或栅极低电压(VGL)的方向性输入信号。通过第(n-2)^移位电阻器或第(n + 2)^移位电阻器的输出信号到自举节点;上拉单元,其连接到自举节点,并通过自举节点的信号激活第一时钟信号,以将第一时钟信号作为输出信号输出至栅极线;噪声消除单元,在正常方向操作中通过第四时钟信号将第(n-1)^移位电阻的输出信号输出到自举节点,并输出第(n + 1)^移位的输出信号通过第二时钟信号在反向操作中抵抗自举节点。

著录项

  • 公开/公告号KR20140050304A

    专利类型

  • 公开/公告日2014-04-29

    原文格式PDF

  • 申请/专利权人 HYDIS TECHNOLOGIES CO. LTD.;

    申请/专利号KR20120116545

  • 发明设计人 SON KI MIN;

    申请日2012-10-19

  • 分类号G09G3/20;G11C19/28;

  • 国家 KR

  • 入库时间 2022-08-21 15:43:07

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