首页> 外国专利> Fabricating method of a semiconductor integrated circuit device and a semiconductor integrated circuit device fabricated by the same

Fabricating method of a semiconductor integrated circuit device and a semiconductor integrated circuit device fabricated by the same

机译:半导体集成电路器件的制造方法和由该半导体集成电路器件制造的半导体集成电路器件

摘要

This reliability is provided a method of manufacturing the improved semiconductor integrated circuit device . A method of manufacturing a semiconductor integrated circuit device is provided , but the first region and the second region is defined, the substrate , the distance gate pattern formed on the first region is small and provide the substrate than the interval of the gate pattern formed on the second region , forming a source / drain trench in the substrate exposed to both sides of the gate pattern, the 1 SiGe epitaxial that using a first source gas containing a silicon source gas fills the first portion of the source / drain trench forming the layer , and using a second source gas comprises a silicon source gas and a first silicon source gas different from the first source / drain forming a first epitaxial layer on a 2 SiGe claim 1 SiGe epitaxial layer in the trench quotation includes .
机译:这种可靠性提供了一种制造改进的半导体集成电路器件的方法。提供了一种制造半导体集成电路器件的方法,但是限定了第一区域和第二区域,即基板,形成在第一区域上的距离栅极图案比形成在基板上的栅极图案的间隔小并且提供基板。第二区域,在暴露于栅极图案两侧的衬底中形成源极/漏极沟槽,第一SiGe外延,即使用包含硅源气体的第一源气体填充形成该层的源极/漏极沟槽的第一部分并使用第二源气体包括硅源气体和与第一源/漏不同的第一硅源气体,在沟槽报价中在2 SiGe权利要求的SiGe外延层上形成第一外延层。

著录项

  • 公开/公告号KR101409374B1

    专利类型

  • 公开/公告日2014-06-19

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20080033268

  • 发明设计人 이지혜;이화성;이호;김명선;

    申请日2008-04-10

  • 分类号H01L21/336;H01L29/78;H01L21/20;

  • 国家 KR

  • 入库时间 2022-08-21 15:40:40

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