首页> 外国专利> Circuit arrangement, a method for reducing of distortion in a sampling circuit and an analog / digital converters with such a sampling circuit

Circuit arrangement, a method for reducing of distortion in a sampling circuit and an analog / digital converters with such a sampling circuit

机译:电路布置,减少采样电路中的失真的方法以及具有这种采样电路的模拟/数字转换器

摘要

A circuit arrangement which comprises the following: an input node; a first signal path which a first sampling and a first signal path switch in a signal path between the input nodes and a first plate of the first sampling capacitor; a second signal path of a second sampling and a second signal path switch in a signal path between the input nodes and a first plate of the second sampling capacitor, and a signal processing circuit for forming a difference between a signal which, on the first sampling is scanned, and a signal is scanned to the second sampling.
机译:一种电路装置,包括:输入节点;第一信号路径,第一采样路径和第一信号路径在输入节点和第一采样电容器的第一极板之间的信号路径中切换;第二采样的第二信号路径和在输入节点和第二采样电容器的第一极板之间的信号路径中的第二信号路径开关,以及用于在第一采样时形成信号之间的差的信号处理电路被扫描,并且信号被扫描到第二采样。

著录项

  • 公开/公告号DE102013110408A1

    专利类型

  • 公开/公告日2014-03-27

    原文格式PDF

  • 申请/专利权人 ANALOG DEVICES INC.;

    申请/专利号DE201310110408

  • 发明设计人 ROBERTO MAURINO;CHRISTOPHER PETER HURRELL;

    申请日2013-09-20

  • 分类号H03M1/12;H03H19/00;

  • 国家 DE

  • 入库时间 2022-08-21 15:37:21

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号