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Circuit arrangement, a method for reducing of distortion in a sampling circuit and an analog / digital converters with such a sampling circuit
Circuit arrangement, a method for reducing of distortion in a sampling circuit and an analog / digital converters with such a sampling circuit
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机译:电路布置,减少采样电路中的失真的方法以及具有这种采样电路的模拟/数字转换器
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摘要
A circuit arrangement which comprises the following: an input node; a first signal path which a first sampling and a first signal path switch in a signal path between the input nodes and a first plate of the first sampling capacitor; a second signal path of a second sampling and a second signal path switch in a signal path between the input nodes and a first plate of the second sampling capacitor, and a signal processing circuit for forming a difference between a signal which, on the first sampling is scanned, and a signal is scanned to the second sampling.
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