Sampling circuit, method for reducing distortion in a sampling circuit and an analog-digital converter with such a sampling circuit

摘要

A sampling circuit comprising: an input node (82) having a single voltage signal; a first signal path (80) including a first sampling capacitor (90) and a first signal path switch (92) on a signal path between the input node (82) and a first plate of the first Sampling capacitor (90); a second signal path including a second sampling capacitor (100) and a second signal path switch (102) on a signal path between the input node (82) and a first plate of the second sampling capacitor (100), and a signal processing circuit (110) for forming a difference between a signal sampled onto the first sampling capacitor from the single voltage signal and a signal sampled onto the second sampling capacitor from the single voltage signal, the first signal path further comprising a second switch (94) for selectively connecting the first plate of the first sampling capacitor to ground or to a pre voltage or a reference voltage, and a third switch (96) for connecting a second plate of the first sampling capacitor to ground or a bias, and wherein the second signal path further comprises a second switch (104) for selectively connecting the first plate of the second sampling capacitor ( 100) to ground or a bias voltage or a reference voltage, and a third switch (106) for connecting a second plate of the second sampling capacitor to ground or a bias voltage.