ASYMMETRIC ULTRATHIN SOI MOS TRANSISTOR STRUCTURE AND METHOD OF MANUFACTURING SAME

摘要

The present invention provides a method of manufacturing an asymmetric ultrathin SOI MOS transistor, comprising: a. providing a substrate formed of an insulating layer (200) and a semiconductor layer (300); b. forming a gate stack layer (304) on the substrate; c. removing a semiconductor material on a side of a source region on the semiconductor layer (300), and forming a first vacancy (001); d. removing insulating materials of the source region and near below a channel of the source region on the insulating layer (200), and forming a second vacancy (002); e. filling a semiconductor material at the first vacancy (001) and the second vacancy (002), the semiconductor material being connected to a semiconductor material above the second vacancy (002); and f. performing injection in the source/drain region. Compared with the prior art, the present invention effectively inhibits adverse influence of a short channel effect, thereby improving device performance.