Develop level clipping circuit for clipping a develop level of a bitline pair, column path circuit including the same, and multi-port semiconductor memory device

摘要

bit line pair of Development Development Rob Rob level clipping level clipping circuit is connected to the supply voltage , write control block and a power supply voltage when the signal is activated , write control signal is connected between the first block and the first block and the bit line pair for supplying a power supply voltage when disabled , the supply voltage is supplied through the first block a pair of bit lines to a clipping level when the developmental Interesting includes a second block . Therefore, the developmental Interesting level clipping circuit is a multi- port semiconductor memory device can be prevented from interference by the skew (skew) and a noise (noise) between the multi- port address when contention occurs .