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Developed cascaded multilevel inverter topology to minimise the number of circuit devices and voltage stresses of switches

机译:开发了级联多电平逆变器拓扑结构,以最大限度地减少电路设备和电压应力或开关的数量

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摘要

In this study, a novel structure for cascade multilevel inverter is presented. The proposed inverter can generate all possible DC voltage levels with the value of positive and negative. The proposed structure results in reduction of switches number, relevant gate driver circuits and also the installation area and inverter cost. The suggested inverter can be used as symmetric and asymmetric structures. Comparing the peak inverse voltage and losses of the proposed inverter with conventional multilevel inverters show the superiority of the proposed converter. The operation and good performance of the proposed multilevel inverter have been verified by the simulation results of a single-phase nine-level symmetric and 17-level asymmetric multilevel inverter and experimental results of a nine-level and 17-level inverters. Simulation and experimental results confirmed the validity and effectiveness performance of the proposed inverter.
机译:在这项研究中,提出了一种新颖的级联多电平逆变器结构。提出的逆变器可以生成所有可能的直流电压电平,其值为正和负。所提出的结构导致减少了开关数量,相关的栅极驱动器电路以及安装面积和逆变器成本。建议的逆变器可以用作对称和非对称结构。将所建议的逆变器的峰值反向电压和损耗与常规多电平逆变器进行比较,可以看出所建议的转换器的优越性。通过单相九电平对称和十七电平非对称多电平逆变器的仿真结果以及九电平和十七电平逆变器的实验结果,验证了所提出的多电平逆变器的操作和良好的性能。仿真和实验结果证实了该逆变器的有效性和有效性。

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