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ANALOG DIGITAL CONVERTER FOR LOW-POWER MULTI-STAGE LATCH INTERPOLATION

机译:用于低功耗多级闩锁插值的模拟数字转换器

摘要

Provided is an analog digital converter. The analog digital converter includes: a first latch terminal which includes first latches, and each of the first latches receives an analog input voltage corresponding to an analog signal and each reference voltage, amplifies a difference between two voltages according to a first clock, and outputs a first differential (+) output and a first differential (-) output; a second latch terminal which has second latches which receive the differential output of a first latch from (+) and (-) input terminals and a second latch which receives the first differential (-) output of a first latch and the first differential (+) output of an adjacent first latch which receives a low reference voltage and the reference voltage of the first latch; and a third SR latch terminal which includes SR latches and generates interpolation output by receiving the (-) output value of a second latch and the (+) output value of a lower second latch adjacent to a second latch.;COPYRIGHT KIPO 2015
机译:提供了一种模拟数字转换器。该模拟数字转换器包括:第一锁存端,其包括第一锁存器,并且每个第一锁存器接收与模拟信号和每个参考电压相对应的模拟输入电压,根据第一时钟放大两个电压之间的差,并输出第一差分(+)输出和第一差分(-)输出;第二闩锁端子,其具有第二闩锁,第二闩锁从(+)和(-)输入端子接收第一闩锁的差分输出;第二闩锁,其接收第一闩锁的第一差分(-)输出和第一差分(+) )相邻的第一锁存器的输出,其接收低参考电压和第一锁存器的参考电压;第三SR锁存端,其包括SR锁存器,并且通过接收第二锁存器的(-)输出值和与第二锁存器相邻的下部第二锁存器的(+)输出值来产生内插输出。COPYRIGHTKIPO 2015

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