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Stepped shallow trench insulation for consequently body contacts in soi - mosfets

机译:阶梯状的浅沟槽绝缘层,可确保人体与身体接触-MOSFET

摘要

Soi - unit which comprises the following:a fet - region (22), which a gate (58) of a fet transistor on an soi - layer (34) comprises;a sti - region, which a first sti - layer (sti - 1), having the soi - unit from an adjacent soi - unit, wherein the first sti - layer has a first thickness;a body contact region (24) between the fet - region and the sti - region, wherein the body contact region an extension (35) of the soi - layer as well as a second sti - layer (sti - 2), which a second thickness, whereby the soi - layer and the soi - extension of a deep troughs doping in order to have a resistance of the soi - layer and of the soi - extension to reduce, wherein a thickness of the soi - extension is less than a thickness of the soi - layer, wherein a concentration of the doping in the soi - extension is maximized in such a way that it has a threshold voltage of the fet transistor is not adversely affected, and wherein in the case that the fet transistor is an n - channel - fet transistor, the doping has a p - type, and in the case that the fet transistor, a p - channel - fet transistor, the doping has an n - type; anda physical contact (67) in contact with the soi - extension;the first thickness of the second thickness and the first and second sti - layer form a stepped sti.
机译:Soi-单元,其包括以下内容:fet-区域(22),其中在soi-层(34)上的fet晶体管的栅极(58)包括; sti-区域,第一sti-层(sti-) 1),具有与相邻的soi-单元相对应的soi-单元,其中所述第一sti-层具有第一厚度;在fet-区域与sti-区域之间的身体接触区域(24),其中所述身体接触区域为扩展层(35)以及第二sti层(sti-2),第二层(sti-2)具有第二厚度,从而深槽掺杂的soi层和soi扩展层具有所述硅层和所述硅延伸层的厚度减小,其中所述硅延伸层的厚度小于所述硅层的厚度,其中,所述硅延伸层中的掺杂浓度以使得它具有对FET晶体管的阈值电压没有不利影响,并且其中在FET晶体管是n-沟道-FET晶体管的情况下,掺杂为p型,在fet晶体管为p沟道fet晶体管的情况下,掺杂为n型。与所述延伸部接触的物理接触件(67);所述第二厚度的所述第一厚度与所述第一和第二sti-层形成阶梯状的sti。

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