Channel - compressive stress (pfet) and - tensile stress (nfet) in the nanowire - fets, the with a replacement - gate - be produced by the process

摘要

A method for producing a field effect transistor (fet) - unit, comprising the steps of:Form of nanowires and contact pads in a silicon - to - insulator (soi) - layer over a layer of buried oxide (box), wherein the nanowires in a ladder-like configuration with the contact pads, and wherein the nanowires are connected by means of the box are suspended;Depositing a hydrogen silsesquioxane having (hsq) - layer, which surrounds the nanowires;Crosslinking of one or more sections of the hsq - layer, which surround the nanowires, wherein the crosslinking has the effect that the one or more sections of the hsq - layer of shrinking, as a result of which a voltage is induced in the nanowires, wherein the voltage induced in the nanowires includes: a) a in one or more sections of the nanowires induced tensile stress and b) a in one or more other sections of the nanowires induced compressive stress; andForming one or more gates, which portions of each of the nanowires, wherein the gates of the voltage, by the cross-linking step, which is induced in the nanowires, and wherein the sections of the nanowires, which are surrounded by the gates, channel zones of the unit, and sections of the nanowires, which extend out of the gates, and the contact pads source - and the drain - zones of the unit have.