首页> 外国专利> Coverage improvement and energy, deliberate clock system for a structural delay - fault - test

Coverage improvement and energy, deliberate clock system for a structural delay - fault - test

机译:覆盖范围的改善和节能,故意的时钟系统的结构性延迟-故障-测试

摘要

The invention relates to methods and devices is provided, which in the case of a clock system of scan - circuits can be used, in order to check for structural delay - fault - tests to improve. In accordance with one aspect comprises a method for use in the case of a clock system of a scan - circuit of a scan - tests, which a clock - gating - cell or a plurality of clock - gating - cells, the following steps:at each stage of the scan - tests the outputting of a controllable waveform of a clock signal at each clock - gating - cell; andEliminating a partially activated clock signal during a detection cycle at each clock - gating - cell.
机译:本发明涉及提供的方法和设备,其在扫描系统的时钟系统的情况下可以使用电路,以便检查结构延迟-故障-测试以改进。根据一个方面,包括一种用于时钟-扫描电路-测试-电路的方法,其中,时钟-门控-单元或多个时钟-门控-单元,进行以下步骤:扫描的每个阶段-在每个时钟-门控-单元上测试时钟信号的可控波形的输出;在每个时钟门控单元的检测周期中消除部分激活的时钟信号。

著录项

  • 公开/公告号DE102014017099A1

    专利类型

  • 公开/公告日2015-05-21

    原文格式PDF

  • 申请/专利权人 INFINEON TECHNOLOGIES AG;

    申请/专利号DE20141017099

  • 发明设计人 ZHEN SONG LI;

    申请日2014-11-19

  • 分类号G01R31/3187;

  • 国家 DE

  • 入库时间 2022-08-21 14:55:14

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