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Coverage improvement and energy, deliberate clock system for a structural delay - fault - test
Coverage improvement and energy, deliberate clock system for a structural delay - fault - test
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机译:覆盖范围的改善和节能,故意的时钟系统的结构性延迟-故障-测试
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摘要
The invention relates to methods and devices is provided, which in the case of a clock system of scan - circuits can be used, in order to check for structural delay - fault - tests to improve. In accordance with one aspect comprises a method for use in the case of a clock system of a scan - circuit of a scan - tests, which a clock - gating - cell or a plurality of clock - gating - cells, the following steps:at each stage of the scan - tests the outputting of a controllable waveform of a clock signal at each clock - gating - cell; andEliminating a partially activated clock signal during a detection cycle at each clock - gating - cell.
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