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System and method for designing semiconductor package using computing system, apparatus for fabricating semiconductor package including the system, and semiconductor package designed by the method
System and method for designing semiconductor package using computing system, apparatus for fabricating semiconductor package including the system, and semiconductor package designed by the method
A system for designing a semiconductor package using a computing system, comprising: a virtual stacking module configured to receive a layout parameter for a first chip, a layout parameter for a second chip, and a layout parameter for a package substrate, and in response to the layout parameters of the first chip, the second chip, and the package substrate, generate a plurality of virtual layouts in which the first and second chips are stacked, on the package substrate; a modeling module configured to model operating parameters for the first and second chips and the package substrate in response to the virtual layouts; and a characteristic analyzing module configured to analyze operating characteristics of the virtual layouts in response to the modeled operating parameters.
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