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III-V CMOS INTEGRATION ON SILICON SUBSTRATE VIA EMBEDDED GERMANIUM-CONTAINING LAYER
III-V CMOS INTEGRATION ON SILICON SUBSTRATE VIA EMBEDDED GERMANIUM-CONTAINING LAYER
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机译:通过嵌入的含锗层在硅基板上进行III-V CMOS集成
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摘要
After forming a first trench and a second trench extending through a top elemental semiconductor layer present on a substrate including, from bottom to top, a handle substrate, a compound semiconductor template layer and a buried insulator layer to define a top elemental semiconductor layer portion for a p-type metal-oxide-semiconductor transistor, the second trench is vertically expanded through the buried insulator layer to provide an expanded second trench that exposes a top surface of the compound semiconductor template layer at a bottom of the expanded second trench. A stack of a compound semiconductor buffer layer and a top compound semiconductor layer is epitaxially grown on the compound semiconductor template layer within the expanded second trench for an n-type metal-oxide-semiconductor transistor.
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