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III-V CMOS INTEGRATION ON SILICON SUBSTRATE VIA EMBEDDED GERMANIUM-CONTAINING LAYER

机译:通过嵌入的含锗层在硅基板上进行III-V CMOS集成

摘要

After forming a first trench and a second trench extending through a top elemental semiconductor layer present on a substrate including, from bottom to top, a handle substrate, a compound semiconductor template layer and a buried insulator layer to define a top elemental semiconductor layer portion for a p-type metal-oxide-semiconductor transistor, the second trench is vertically expanded through the buried insulator layer to provide an expanded second trench that exposes a top surface of the compound semiconductor template layer at a bottom of the expanded second trench. A stack of a compound semiconductor buffer layer and a top compound semiconductor layer is epitaxially grown on the compound semiconductor template layer within the expanded second trench for an n-type metal-oxide-semiconductor transistor.
机译:在形成延伸穿过存在于基板上的顶部元素半导体层的第一沟槽和第二沟槽之后,该衬底包括从下到上的处理衬底,化合物半导体模板层和掩埋绝缘体层,以限定用于在p型金属氧化物半导体晶体管中,第二沟槽垂直延伸通过掩埋绝缘体层,以提供扩展的第二沟槽,该第二沟槽在扩展的第二沟槽的底部暴露化合物半导体模板层的顶表面。在n型金属氧化物半导体晶体管的扩展的第二沟槽内的化合物半导体模板层上外延生长化合物半导体缓冲层和顶部化合物半导体层的堆叠。

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