首页>
外国专利>
Semiconductor Device and Method of Forming Conductive Vias by Backside Via Reveal with CMP
Semiconductor Device and Method of Forming Conductive Vias by Backside Via Reveal with CMP
展开▼
机译:半导体装置和利用CMP露出背面通孔形成导电通孔的方法
展开▼
页面导航
摘要
著录项
相似文献
摘要
A semiconductor device has a semiconductor wafer and a conductive via formed through the semiconductor wafer. A portion of the semiconductor wafer is removed such that a portion of the conductive via extends above the semiconductor wafer. A first insulating layer is formed over the conductive via and semiconductor wafer. A second insulating layer is formed over the first insulating layer. The first insulating layer includes an inorganic material and the second insulating layer includes an organic material. A portion of the first and second insulating layers is removed simultaneously from over the conductive via by chemical mechanical polishing (CMP). Alternatively, a first insulating layer including an organic material is formed over the conductive via and semiconductor wafer. A portion of the first insulating layer is removed by CMP. A conductive layer is formed over the conductive via and first insulating layer. The conductive layer is substantially planar.
展开▼