Techniques for multiple gate workfunctions for a nanowire CMOS technology

摘要

In one aspect, a method of forming a CMOS device with multiple transistors having different Vt's is provided which includes: forming nanowires and pads on a wafer, wherein the nanowires are suspended at varying heights above an oxide layer of the wafer; and forming gate stacks of the transistors at least partially surrounding portions of each of the nanowires by: i) depositing a conformal gate dielectric around the nanowires and on the wafer beneath the nanowires; ii) depositing a conformal workfunction metal on the conformal gate dielectric around the nanowires and on the wafer beneath the nanowires, wherein an amount of the conformal workfunction metal deposited around the nanowires is varied based on the varying heights at which the nanowires are suspended over the oxide layer; and iii) depositing a conformal poly-silicon layer on the conformal workfunction metal around the nanowires and on the wafer beneath the nanowires.