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Guided exploration of circuit design states

机译:指导探索电路设计状态

摘要

A model checking tool, which is used to test a circuit design, attempts to reach a target state from an initial state in the state-space of the circuit design using one or more intermediate states. Through an iterative process, the tool identifies intermediate states in the state-space of the circuit design that are used to generate starting states for subsequent iterations of the process. The intermediate states help to restrict the scope of the state-space search to reduce the time and memory requirements needed to reach the target state. The model checking tool also explores the state-space in parallel from a subset of computed restart states, which reduces the possibility of bypassing any essential intermediate or target states.
机译:一种用于测试电路设计的模型检查工具尝试使用一个或多个中间状态从电路设计的状态空间中的初始状态达到目标状态。通过迭代过程,该工具可以识别电路设计状态空间中的中间状态,这些中间状态用于为过程的后续迭代生成起始状态。中间状态有助于限制状态空间搜索的范围,以减少达到目标状态所需的时间和内存需求。模型检查工具还从计算的重新启动状态的子集中并行探索状态空间,这减少了绕过任何基本中间状态或目标状态的可能性。

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